A systematic study of the sharp-switching Z-FET device: From mechanism to modeling and compact memory applications

This paper presents a systematic study of a sharp-switching device built in fully-depleted silicon-oninsulator (FD-SOI) that we have called Z-FET, as it features zero subthreshold swing (<1 mV/decade of current) and zero impact ionization. The Z-FET is a compact device with a single front gate that experimentally demonstrates a current ION/IOFF ratio >10 at low supply voltage, as well as gate-controlled hysteresis. The operating principle of the sharp switching involves the positive feedback between carrier flow and gate-controlled injection barriers, as confirmed by TCAD simulations. We discuss the impact of bias and device dimensions on the experimental performance and simulate the Z-FET’s ultimate scaling capability to <50 nm channel length. We present a simplified compact model of the Z-FET. With good reliability and relative insusceptibility to temperature variation, the envisioned applications of the Z-FET include compact, high-speed one transistor DRAM (1T-DRAM), one-transistor SRAM, fast logic and electrostatic discharge (ESD) protection circuits. 2013 Published by Elsevier Ltd.